An article entitled xe2x80x9cA Single-path Multi-bit DAC for LP xcex94xcexa3 A/D Convertersxe2x80x9d by Loai Louis and Gordon W. Roberts, in Proceedings of IEEE Symposium on Circuits and Systems, Monterey, Calif. 1998 (that is incorporated by reference herein in its entirety) describes a digital-to-analog converter (DAC) based on encoding direct current (DC) levels in a sequence of bits (called xe2x80x9cbitstreamsxe2x80x9d). The DAC converts a xe2x80x9cmulti-bit digital value into bitstreams which are then filtered by an analog filter to extract the DC levels encoded therein.xe2x80x9d (see abstract).
As noted in the article, such xe2x80x9cbitstreams can be used to generate a variety of signals including DC levels. Thus, they can be used to encode the various levels corresponding to a multi-bit input code. A multiplexer can then decide, based on the input, which bitstream to output. For example, consider building a 3-bit midriser DAC to output levels between +/xe2x88x921. . . . To encode one of the levels, {fraction (5/7)} for example, in a bitstream, with the two supplies being +/xe2x88x921, a bitstream of length 7 containing 6 ones and 1 negative one is needed. This bitstream will average to (6xe2x88x921)/7={fraction (5/7)}, giving the exact value required . . . the result of repeating a bitstream sequence is a series of tones @nFs/N, n=0, 1, . . . N, Fs being the clocking frequency and N the length of the bitstream sequence.xe2x80x9d A low pass filter (LPF) attenuates the Fs/N tones and leaves the required DC level.
According to the above-described article, hardware savings are obtained by realizing that inverting the bitstreams of the positive levels results in the corresponding negative DC levels, saving half the bitstreams required. Thus, for a 3-bit DAC, only 3 bitstreams, each 7 bits long, are required (and a LPF) to implement the 8 levels. The article discloses storing the DAC""s different output levels as the average values of several digital bitstreams, as illustrated in FIG. 1. The accuracy of the DAC depends on (1) order of the LPF (the more attenuation is provided, the closer to DC the levels are, but the filter usually takes longer to settle); and (2) the length of the bitstreams used (the shorter the bitstreams, the higher in frequency (nFs/N) the AC tones are located, requiring a lower order filter or e settling time. For short bitstreams, the AC components are fairly high in frequency, thus excluding the possibility of using noise-shaped bitstreams.
Note that the bitstream generator circuit in the above-described article could also be implemented using a finite-state machine or some other form of digital circuitry.
A device in accordance with the invention includes a Digital to Analog Converter (DAC) having a dynamic range (ratio of the maximum output to the smallest output, expressed in, for example, decibels) that is adjustable. Specifically, the DAC (also called xe2x80x9cadjustable DACxe2x80x9d) has an input port to receive a digital signal to be converted into an analog signal, and also has, a control port to receive a control signal that indicates the dynamic range. The adjustable DAC provides an analog signal having a voltage that corresponds to the digital signal, and having the dynamic range indicated by the control signal. Therefore, the adjustable DAC can generate, for example, an analog signal in the range of 0 and 5 volts in increments of 1/n where n is any number that may be indicated by the control signal, such as an integer (e.g. 3, 4, 5, 6, 7, 8, 9, 10 . . . ).
In one embodiment, an adjustable DAC includes a circuit (called xe2x80x9ctunable bitstream generatorxe2x80x9d) that supplies to a low pass filter a periodic signal having its periodicity determined by the dynamic range signal (e.g. the periodicity is automatically decreased if the dynamic range is increased and vice versa). In one implementation, the tunable bitstream generator includes a state machine that dynamically generates a bitstream of variable length, wherein the length is determined by the dynamic range signal. For a given value of the dynamic range signal, the length of the bitstream remains fixed, and the bitstreams is repeatedly supplied by the bitstream generator to the low pass filter, which in turn generates the analog signal from the repeated bitstream.
An adjustable DAC of the type described above can be used in the normal manner, in any circuit that uses a DAC as long as the circuit provides the above-described control signal (which indicates the dynamic range to the DAC). In one embodiment, the circuit includes a storage element (such as a register) that is initialized with a value provided, for example, by a user. The user stores a dynamic range requirement in the storage element once, e.g. depending on the application in which the DAC is being used. Therefore, the adjustable DAC allows the same circuitry to be used in a number of applications that require different dynamic ranges, as long as the user stores the required dynamic range for each application in the respective circuit""s storage element. Moreover, such a circuit (that uses the adjustable DAC) is not made obsolete if the only change is the dynamic range, because a new dynamic range can be stored at any time (in the above-described storage element). When a new dynamic range is stored, power to the circuit is turned off and on in one embodiment, to avoid transient signals (e.g. by resetting the above-described state machine).
In one embodiment, the tunable bitstream generator is implemented as a portion of an integrated circuit chip, while the low pass filter is implemented off-chip, e.g. on a printed circuit board. Such separation of the digital and analog portions of the adjustable DAC allows the user to design and implement a DAC the user needs. Specifically, tunability of the bitstream generator provides flexibility to the user in implementing the low pass filter. For example, a user may decide to use a first order low pass filter (formed by just a resistor and a capacitor), in which case the user provides a sufficiently low dynamic range to the bitstream generator to ensure that a first harmonic is sufficiently far away from the DC component. In another example, an application may need a high dynamic range, and the user may use a second or third order low pass filter despite the cost (because of the need). In both examples, an identical integrated circuit chip can be used, thereby to reduce cost (because of mass production of such chips).
The ability to arbitrarily define (by use of a storage element or otherwise) the dynamic range (as described above) supports the user""s design of a DAC that is specific to each application. A tunable bitstream generator (described above) allows the user to achieve any dynamic range simply by supplying an appropriate control signal to the tunable bitstream generator, thereby to result in a flexible and easy-to-use DAC.